1. Field of the Invention
The present invention relates to the field of computers. More specifically, the present invention relates to computer architecture.
2. Description of the Related Art
The increasing disparity between processor speeds and memory access speeds exacerbates the already heavy demand on memory bandwidth. In addition, the focus on throughput computing sensitive multi-core processor designs further increases the demand on memory bandwidth.
Write operations consume a significant portion of memory bandwidth. When a write operation is performed, the value of the write operation is written to cache as well as system memory. The moment when the value is written to system memory is dependent upon the write policy implemented, such as writeback versus write-through. Some write operations do not effectively change the corresponding location in system memory or cache. In other words, the write operation is writing the same value that already resides at the destination of the write operation. Although performance of such a write operation does not change the contents of the destination location, memory bandwidth is spent on the write operation, as well as other resources, such as resources expended unnecessarily firing write pins.
In a shared memory system with a directory based coherence protocol, changes of state of a shared memory location are represented in the shared memory's memory controller. When a non-owning processor requests data from a shared memory location, the memory controller determines whether the state of the data at the shared memory location is dirty or clean. If the state of the memory location is dirty (e.g., M or I), then the owning processor is consulted for the most current data for that shared memory location. The memory controller requests the data from the owning processor, and the owning processor transmits the data to the memory controller. The memory controller updates the shared memory location and forwards a copy of the current data to the requestor non-owning processor, and updates the shared memory location with the data from the owning processor. Even if the owning processor's data and the data at the shared memory location are the same, bandwidth is still consumed by the owning processor transmitting the data to the memory controller, which then updates the shared memory location with the received data, even though the data being overwritten is the same as the received data.